Abaco - FMC165 FPGA Mezzanine Card, Dual Channel ADC and Single Channel DAC

Abaco - FMC165 FPGA Mezzanine Card, Dual Channel ADC and Single Channel DAC
  • ADC32RF44 ADC: dual-channel 14-bit up to 2.6 GSPS with DDC (or 14-bit @ 2.5 GSPS with full data rate)
  • AD9129 DAC: single-channel 14-bit up to 5.2 GSPS (2.6 GSPS data rate)
  • RF input bandwidth up to 3.2 GHz and output up to 2.6 GHz in x2 interpolation mode
  • JESD204B (A/D), LVDS (D/A) FPGA data buses
  • Single-ended AC-coupled analog signals
  • 6 SSMB connectors available from the front panel
  • Clock source, sampling frequency and calibration through I2C communication
  • buses
  • Flexible clock tree enables
    • on board VCO - 1.5 to 2.6 GHz
    • external reference clock
    • external sampling clock
  • Multi-board synchronization capable
  • ANSI/VITA 57.1 compliant
  • HPC (high pin count) compatible
  • Conduction-cooled configuration available on Abaco FPGA carrier cards

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The FMC165 provides two 14-bit analog-to-digital (A/D) channels supporting RF sampling at 2.6 GSPS and one 14-bit digital-to-analog (D/A) channel with sampling rates up to 5.2 GSPS (2.6 GSPS direct RF synthesis). The converters are clocked by either an internal clock source (optionally locked to an external reference) or an externally supplied sample clock. In addition, a trigger input for customized sampling control is available to users.

The FMC165 daughter card is mechanically and electrically compliant with the FMC standard (ANSI/VITA 57.1). It has front panel I/O and can be used on any FMC/ FMC+ compatible carrier in an air-cooled configuration. In a conduction-cooled environment, it can be used with Abaco FPGA carrier cards.

The design is based on Texas Instruments’ high-speed, high-performance ADC32RF44 A/D converter (ADC) and Analog Devices’ AD9129 D/A converter (DAC). The analog signals are AC coupled connecting to SSMB coax connectors on the front panel.

The FMC165 allows flexible control of clock source through serial communication buses. The card is equipped with power supply and temperature monitoring and offers several power-down modes to switch off unused functions in order to reduce system level power consumption.

The FMC165 is well suited for low power applications such as airborne where the highest level of performance is required while ensuring that mission range is not affected.

More Product Information

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  • Onboard GPS receiver for accurate data time stamping
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  • VITA 57.1 compliant
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  • A breakout cable on the front panel makes all clock and trigger signals available on individual SMA sockets.

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  • Conduction-cooled version available (Deviation from Standard)
  • AC-coupled analog signals
  • 5 SSMC front panel connectors
  • Sampling frequency and calibration through I2C communication
  • Flexible clock tree enables:
    • Internal clock source
    • External reference clock
  • Trigger signal to enable multiboard synchronization
  • Power-down modes to switch off unused functions for system power savings
  • MIL-I-46058c Conformal Coating compliant (optional)

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  • Two operational modes
    • 4 channels, 12-bit, 3.2GSPS data rate
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  • VITA 57.4 HSPC FMC+ site required
  • 16 JESD204B lanes at 12.8GBPS
  • 8 JESD204B lanes passed to board topside for FMC stacking
  • Optional FMC+e connection for additional stacked serial lanes
  • Conduction cooled configuration available
  • AC-coupled analog input
  • 9 front panel MMCX connectors
  • Internal or external clock
  • MIL-I-46058c conformal coating (optional)
  • 2Kbit EEPROM (M24C02-WDW) accessible from the host via I2C bus
  • Full-featured board support package.
    • Open source VHDL reference design
    • Open source C/C++ reference examples. Windows® and Linux® support.
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Abaco - FMC424 FPGA Mezzanine Card, Stackable QSFP+ Module
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  • 10.3125 Gbps per transceiver, 82.5 Gbps total data rate
  • GBT FMC connector signaling
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  • External Event time tags
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  • One ADC12D1800: Single channel 12-bit 3.6Gsps
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  • VITA 57.1-2010 compliant
  • Conduction Cooled - Standard Option
  • Single ended AC-coupled analog signals
  • 6 MMCX/SSMC connectors available from the front panel
  • 4 LVTTL signals available from an HDMI connector on the front panel
  • 4 Xilinx MGT available from an HDMI connector on the front panel
  • Clock Source, Sampling Frequency through SPI communication busses
  • Flexible clock tree enables:
    • on board VCO: 2200MHz - 4400MHz
    • external reference clock
    • external sampling clock
  • Power-down modes to switch off unused functions for system power savings
  • Mil-I-46058c Conformal Coating Compliant (optional)
  • HPC (high-pin count) compatible
  • LVDS IO signaling X

Abaco Systems

Abaco's history goes back more than 30 years, to the days of Plessey Microsystems in the UK – one of the first adopters worldwide of the ‘new’ VME standard. A management buyout saw Plessey become Radstone, who acquired ICS and Octec. Meanwhile, equally prominent embedded computing companies including SBS, VMIC and Condor Engineering were being acquired by GE to bolster its offering in that area – and Radstone was acquired by GE Fanuc Embedded Systems in September 2006. GE Fanuc Embedded Systems subsequently became GE Intelligent Platforms and, in September 2015, the embedded computing part of the business was acquired by Veritas Capital. The resulting business was named Abaco Systems.

We’re 700+ people, with our global headquarters in Huntsville, Alabama; a European headquarters and manufacturing site in Towcester, England; and offices throughout the world.

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