Abaco - FMC424 FPGA Mezzanine Card, Stackable QSFP+ Module

Abaco - FMC424 FPGA Mezzanine Card, Stackable QSFP+ Module
  • Dual QSFP+
  • 10.3125 Gbps per transceiver, 82.5 Gbps total data rate
  • GBT FMC connector signaling
  • ANSI/VITA 57.1-2010 electrically compliant
  • 1.5V to 3.3V VADJ operation
  • High Pin Count (HPC) connector
  • MIL-I-46058c conformal coating (optional)

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The FMC424 is a dual QSFP+ FPGA mezzanine card.

Electrically compliant with the VITA 57.1 standard, the FMC424 is compatible with Abaco Systems' FPGA carrier cards offering high pin count connectors. It also allows for the option to stack an additional FMC over it.

Any of the Abaco Systems FMCs that use LVDS and single-ended signaling only can be mounted over the FMC424, thus offering users the ability to build a complete high speed data acquisition, waveform generation and optical communication solution while using a single FMC site on an FPGA carrier card.

The FMC424 is an ideal solution to bring high speed optical connectivity to an FPGA-based system and ensure reliable external communication.

Board Support Package

Our Board Support Package helps customers get their hardware implementation underway as quickly as possible by providing reference designs, the Stellar IP FPGA development tool, and the 4FM GUI user interface for controlling and monitoring the hardware, as well as other supporting elements.

More Product Information

Abaco - FMC172 FPGA Mezzanine Card, Wideband Low Latency FMC Module
  • Single-channel, 10-bit A/D up to 6.4GSPS
  • Single-channel, 10-bit D/A up to 6.0GSPS
  • VITA 57.1 FMC compliant
  • Conduction-cooled version available (Deviation from Standard)
  • AC-coupled analog signals
  • 5 SSMC front panel connectors
  • Sampling frequency and calibration through I2C communication
  • Flexible clock tree enables:
    • Internal clock source
    • External reference clock
  • Trigger signal to enable multiboard synchronization
  • Power-down modes to switch off unused functions for system power savings
  • MIL-I-46058c Conformal Coating compliant (optional)

Abaco - FMC134 FPGA Mezzanine Card, Direct RF conversion module
  • Two operational modes
    • 4 channels, 12-bit, 3.2GSPS data rate
    • 2 channels, 12-bit, 6.4GSPS data rate
  • VITA 57.4 HSPC FMC+ site required
  • 16 JESD204B lanes at 12.8GBPS
  • 8 JESD204B lanes passed to board topside for FMC stacking
  • Optional FMC+e connection for additional stacked serial lanes
  • Conduction cooled configuration available
  • AC-coupled analog input
  • 9 front panel MMCX connectors
  • Internal or external clock
  • MIL-I-46058c conformal coating (optional)
  • 2Kbit EEPROM (M24C02-WDW) accessible from the host via I2C bus
  • Full-featured board support package.
    • Open source VHDL reference design
    • Open source C/C++ reference examples. Windows® and Linux® support.
    • JESD204B core included
    • Simplified IP integration with StellarIP

Abaco - FMC407 FPGA Mezzanine Card, Clock and Trigger Distribution FMC
  • External clock input and onboard VCO
  • External reference input and onboard reference (30.72MHz)
  • Eight synchronized clock outputs
    • 34.375MHz-4.4GHz
  • Eight synchronized trigger or 1PPS outputs
  • Onboard GPS receiver for accurate data time stamping
  • Fully controllable from FMC connector
  • VITA 57.1 compliant
  • LPC (low-pin count) compatible
  • Conformal Coating (optional)
  • Conduction cooled (optional)
  • A breakout cable on the front panel makes all clock and trigger signals available on individual SMA sockets.

Abaco - FMC165 FPGA Mezzanine Card, Dual Channel ADC and Single Channel DAC
  • ADC32RF44 ADC: dual-channel 14-bit up to 2.6 GSPS with DDC (or 14-bit @ 2.5 GSPS with full data rate)
  • AD9129 DAC: single-channel 14-bit up to 5.2 GSPS (2.6 GSPS data rate)
  • RF input bandwidth up to 3.2 GHz and output up to 2.6 GHz in x2 interpolation mode
  • JESD204B (A/D), LVDS (D/A) FPGA data buses
  • Single-ended AC-coupled analog signals
  • 6 SSMB connectors available from the front panel
  • Clock source, sampling frequency and calibration through I2C communication
  • buses
  • Flexible clock tree enables
    • on board VCO - 1.5 to 2.6 GHz
    • external reference clock
    • external sampling clock
  • Multi-board synchronization capable
  • ANSI/VITA 57.1 compliant
  • HPC (high pin count) compatible
  • Conduction-cooled configuration available on Abaco FPGA carrier cards

Abaco - PEX442 6U VPX Mezzanine Carrier Card
  • 6U VPX and VPX-REDI form factors with optional front and rear side covers for 2 Level Maintenance requirements
  • Supports up to three mezzanines
    • Two PMC/XMC modules
    • One AFIX module
  • Mezzanine I/O routed to VPX backplane
  • Non-blocking Gen 2 PCI Express switch with four x4 ports to the backplane
  • Air and rugged conduction cooled variants

Abaco - VP889 Virtex Ultrascale+ FPGA, Zynq Ultrascale+ and FMC+, 3U OpenVPX FPGA Card
  • Dual FPGA architecture
    • Virtex Ultrascale+
    • Zynq Ultrascale+ MPSoC
  • 8GB DDR4 mapped to FPGA
  • 2GB DDR4 mapped to Zynq
  • VITA 57.4 HSPC FMC+ site interfacing with the Ultrascale FPGA
  • Conduction cooled configuration available
  • VITA 66.4 optical interface via FireFly BLAST site
  • Up to two COM ports from the Zynq to the backplane
  • 1 GB Ethernet PHY to backplane
  • Front panel USB UART
  • SATA 3.0, DisplayPort to backplane RTM
  • VPX backplane GPIO
  • I2C interface P0 to Zynq
  • Operating system support
    • Linux®
    • Windows®
    • VxWorks®
  • Full-featured Board Support Package (BSP)
    • Open VHDL reference design
    • Open C/C++
    • PCIe™ core included with BSP
    • Peta Linux® reference design

Abaco - PNIC1G PCI Mezzanine Card (PMC) Dual/Four Channel 10/100/1000 Mbit/s Ethernet
  • Software support for Intel™ I210IT at www.intel.com
  • For operating systems not supported by Intel™, please contact Abaco Systems

Abaco - VP880 / VP881 3U OpenVPX FPGA Card
  • Dual FPGA architecture
    • Kintex or Virtex Ultrascale
    • Zynq Ultrascale+ MPSoC
  • 8GB DDR4 mapped to FPGA
  • 2GB DDR4 mapped to Zynq
  • VITA 57.4 HSPC FMC+ site interfacing with the Ultrascale FPGA
  • Conduction Cooled Configuration Available
  • VITA 66.4 optical interface via FireFly BLAST site
  • Up to two COM ports from the Zynq to the backplane
  • 1 GB Ethernet PHY to Backplane
  • Front Panel USB UART
  • SATA 3.0, Display Port to Backplane RTM
  • VPX Back plane GPIO
  • I2C Interface P0 to Zynq
  • Operating system support
    • Linux®
    • Windows®
    • VxWorks®
  • Full-featured Board Support Package (BSP)
    • Open VHDL reference design
    • Open C/C++
    • PCIe™ core included with BSP
    • Peta Linux® reference design

Abaco - VP680 FPGA Card, Virtex™ 6 3U VPX VITA 46 Compliant FMC carrier
  • Virtex-6 LX130T, LX240T, LX365T, SX315T, SX315T, SX475T
  • High density Memory Options using BLAST sites: DDR2 and DDR3 SDRAM, QDR2 SRAM, NAND FLASH.
  • VPX VITA 46 Compliant
  • Front Panel FPGA Mezzanine Card (FMC)
  • UART over USB
  • Gen 1 and Gen 2 PCI express
  • VITA 48.2 compliant (1 inch Pitch)

Abaco Systems

Abaco's history goes back more than 30 years, to the days of Plessey Microsystems in the UK – one of the first adopters worldwide of the ‘new’ VME standard. A management buyout saw Plessey become Radstone, who acquired ICS and Octec. Meanwhile, equally prominent embedded computing companies including SBS, VMIC and Condor Engineering were being acquired by GE to bolster its offering in that area – and Radstone was acquired by GE Fanuc Embedded Systems in September 2006. GE Fanuc Embedded Systems subsequently became GE Intelligent Platforms and, in September 2015, the embedded computing part of the business was acquired by Veritas Capital. The resulting business was named Abaco Systems.

We’re 700+ people, with our global headquarters in Huntsville, Alabama; a European headquarters and manufacturing site in Towcester, England; and offices throughout the world.

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