Products

Displaying 1 - 11 of 11

New Wave DV - 1394b AS5643 Offload Engine IP Core

  • AS5643 compliant interface with hardware based STOF offload
  • Hardware DMA engines with message label mapped buffers
  • STOF transmitter and receiver hardware functions
  • Supports S100/S200/S400/S800/S1600/S3200 data rates
  • Configurable number of nodes and ports in a single FPGA
  • AXI-based host interface for embedded or PCIe based processors
  • Increased performance with hardware-based AS5643 offload
  • Hardware-based message label filtering and host DMA setup
  • Additional diagnostics and programmable operation features
  • Leverage proven technology for standard interface implementation

New Wave DV - 1394b GP2Lynx Link Layer IP Core

  • AS5643 compliant interface with hardware based STOF offload
  • Supports S100/S200/S400/S800/S1600/S3200 data rates
  • Configurable number of GP2Lynx nodes in a single FPGA
  • Legacy microprocessor or AXI host interface available
  • Standard PHY-Link interface
  • Increase interface port density while reducing interface size and power
  • Increased performance with hardware based AS5643 offload
  • Additional diagnostics and programmable operation features
  • Leverage proven technology for standard interface implementation

New Wave DV - 1394b OHCI Link Layer IP Core

  • AS5643 compliant interface with hardware based STOF offload
  • Supports S100/S200/S400/S800/S1600/S3200 data rates
  • Configurable number of OHCI nodes in a single FPGA
  • AXI-based host interface for embedded or PCIe based processors
  • Standard PHY-Link interface
  • Increase interface port density while reducing interface size and power
  • Increased performance with hardware-based AS5643 offload
  • Additional diagnostics and programmable operation features
  • Leverage proven technology for standard interface implementation

New Wave DV - 1394b PHY IP Core

  • AS5643 compliant interface
  • Supports S100/S200/S400/S800/S1600/S3200 data rates
  • Complete PHY layer implementation
  • Configurable number of ports per PHY instantiation
  • Configurable number of PHYs in a single FPGA Standard PHY-Link interface
  • Increase interface port density while lowering size and power
  • Additional diagnostics and programmable operation features
  • Leverage proven technology for standard interface implementation

New Wave DV - ARINC-818 IP Core

  • ARINC-818 compliant interface with hardware based offload
  • Hardware DMA engines with ARINC-818 container mapping
  • ARINC-818 container processing offloaded in hardware
  • Supports 1/2/3/4G data rates
  • Configurable number of ports in a single FPGA
  • AXI-based host interface for embedded or PCIe based processors
  • Increased performance with hardware-based ARINC-818 offload
  • Hardware-based container processing and host DMA setup
  • Leverage proven technology for standard interface implementation

New Wave DV - expressXG™ FPGA Development Framework

  • Modular, easy-to-use product that integrates all high-performance interfaces of the network card into one design
  • User-designated sandbox region provides easy integration with network card interfaces
  • Compatible with standard FPGA development tools from major vendors
  • Complete high-performance software libraries and drivers for Linux and VxWorks
  • Accelerates FPGA application development time-to-market
  • Enables seamless migration of applications to new cards and technologies as they become available
  • Minimizes the costs associated with product integration
  • Simplifies overall logistics of FPGA application development

New Wave DV - Fibre Channel Anonymous Subscriber Messaging (ASM) IP Core

  • Message label validation checks performed in hardware
  • Multiple user modes for receiving messages, including strictly mapped message-to-buffer and free-buffer implementations
  • Transmit message chaining options provided
  • Complete set of registers for managing core and configuring core options
  • Core can be replicated as desired for number of FC-ASM ports
  • Immediate compatibility with existing FC-ASM networks
  • Flexible implementation models for multi-port designs
  • Low risk implementation

New Wave DV - Fibre Channel Audio Video (AV) IP Core

  • FC-AV compliant interface with hardware based offload
  • Hardware DMA engines with FC-AV container mapping
  • FC-AV container processing offloaded in hardware
  • Supports 1/2/4/8/16G data rates
  • Configurable number of ports in a single FPGA
  • AXI-based host interface for embedded or PCIe based processors
  • Increased performance with hardware-based FC-AV offload
  • Hardware-based FC-AV container processing and host DMA setup
  • Leverage proven technology for standard interface implementation

New Wave DV - Fibre Channel Link Layer IP Core

  • Supports 1/2/4/8/16 Gigabit Fibre Channel N Port and F Port Types
  • Class 2 and Class 3 Fibre Channel Support
  • Switched Fabric or Point-to-Point
  • Complete FC1-FC2 functionality
  • Intuitive streaming user interface
  • Scales for multiple port designs
  • Accelerates FPGA application development time-to-market
  • Leverage proven technology for standard interface implementation
  • Lower development costs

New Wave DV - Fibre Channel Remote Direct Memory Access (RDMA) IP Core

  • Multiple user modes for receiving frames and  Data IUs
  • Transmit message chaining options provided
  • Complete set of registers for managing core and configuring core options
  • Core can be replicated as desired for number of FC-RDMA ports
  • Immediate compatibility with existing FC-RDMA networks
  • Flexible implementation models for multi-port designs
  • Low risk implementation

New Wave DV - Serial Front Panel Data Port (sFPDP) IP Core

  • Supports 1/2/2.5/10 Gigabit sFPDP rates
  • Adheres to VITA 17.3-2018
  • Complete hardware-based protocol offload
  • High performance full-bandwidth operation
  • Intuitive streaming user interface
  • Scales for multiple port designs
  • Accelerates FPGA application development time-to-market
  • Leverage proven technology for standard interface implementation
  • Lower development costs