In this session we will discuss the expected PCI Express 7.0 Transmitter tests for the Electrical (PHY) Layer.

Topics to be covered in this webinar:

• Protocol Changes from PCIe 6.x to PCIe 7.0
• Logical PHY Layer tests including Link Training and Equalization
• Data Link Layer and Transaction Layer testing
• Equipment required for running tests
• Retimer testing

Who should attend? Hardware Design, Software and Firmware Engineers creating PCIe 7.0 designs, Validation engineers expecting to work on PCIe 7.0.

What will attendees learn? Learn which tests are required, and how to run them to best prepare for compliance certification.

Presenter: Gordon Getty, Senior Director of Product Management, Interconnects program

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